1. Field of the Invention
This invention generally relates to integrated memory circuits, and more specifically, to changing the soft error sensitivity of electronic components.
2. Background Art
Soft errors in the operation of integrated circuits or programs run on such circuits are caused by transient events, such as chip noise, inductance between wires and radiation effects. Typically, any specific soft error does not repeat itself, and programs may be provided with procedures or hardware to correct for these errors. For instance, when an error is detected, a program may skip back a few steps and then repeat those few steps.
The susceptibility of a particular circuit to soft errors may change depending on various circumstances, including the actual location of the circuit. One reason for this is the fact that radiation effects, such as protons, neutrons, pions, etc., may vary significantly from place to place and from time to time such as the eleven year period of the solar cycle.
There are different ways to respond to soft errors, and these different ways have different costs and result in different lengths of delays. Because of this, it may be desirable for a circuit to respond in different ways depending on the likelihood of soft errors. For instance, if soft errors are not very likely, it may be best to use a soft error correction procedure that checks only occasionally for errors, even though this may result in a comparatively lengthy delay to fix an error. In contrast, if soft errors are more likely, it may be best to use a procedure that checks frequently for errors, but which does not take long to correct any detected errors.
Several techniques are known that can change the way in which a circuit responds to soft errors, but these known techniques have various disadvantages. For instance, some are very slow and may take days to determine whether the chip sensitivity should be changed. These techniques are therefore not of much practical value. Other techniques require redundant cells. These cells take up valuable chip space and, also, may themselves be disturbed by normal chip noise.